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A special poster session dedicated to MRAM at IEDM 2017
Dec 4, 2017 - Dec 6, 2017



Special MRAM poster session.

IEDM (4-6 Dec 2017, San-Francisco)

Tuesday afternoon 5 Dec, 2:00pm-5:30pm

 Exhibit area - Yosemite room

With the rising interest of the microelectronics industry in STT-MRAM, it is very important to strengthen the relationship between the microelectronics and magnetism communities in order to accelerate the development of this new hybrid technology. For that, a special poster session entirely dedicated to MRAM (MRAM materials/phenomena/ technology/testing, hybrid CMOS/MTJ technology and circuits, spin-logic) is organized during IEDM.  A similar MRAM poster session took place at IEDM 2016 and was very successful with 33 posters presented and very active cross-disciplinary discussions. This session is technically organized by the IEEE Magnetics Society and is embedded in the IEDM 2017 conference. This event will be a great opportunity to bring together experts in magnetism and in microelectronics. This year, 35 posters were accepted for presentation. The list is shown below.

Bernard DIENY and Bruce TERRIS
IEEE Magnetics Society


Presented posters :


1. Improvement of magnetic and transport properties in perpendicular-anisotropy MTJs by engineering tungsten insertion layer sputtering conditions

H. Honjo1,7, S. Ikeda1,2,4,5,7, H. Sato1,2,3,4, K. Nishioka 1,7, T. Watanebe1,7, S. Miura1,7, T. Nasuno1,7,Y. Noguchi1,7,

H. Inoue1,7, M. Yasuhira1,7, T. Tanigawa1,7, H. Koike1,7, M. Muraguchi1,5,7, M. Niwa1,7, H. Ohno1,2,3,4,6, and T. Endoh1,2,4,5,7

1 Center for Innovative Integrated Electronic Systems, Tohoku University, Sendai, Japan,

2 Center for Spintronics Integrated Systems, Tohoku University,

3 Laboratory for Nanoelectronics and Spintronics, Research Institute of Electrical Communication,

Tohoku University,

4Center for Spintronics Research Network, Tohoku University,

5Graduate School of Engineering, TohokuUniversity,

6WPI-Advanced Institute for Materials Research (WPI-AIMR), Tohoku University,


2. Material optimization for STT-MRAM performance improvements

J. Chatterjee1, P. V. Coelho1, R. Sousa1, S. Auffret1, C. Ducruet1, & B. Dieny1

1Univ. Grenoble Alpes, CEA, CNRS, Grenoble-INP, INAC-SPINTEC, Grenoble, France


3. Tuning of magnetic anisotropy and RA in bottom pinned pTMR stacks by O surface treatment

J. Wrona,  J. Langer, S. Tibus, B. Ocker

Singulus Technologies AG, Hanauer Landstr. 103, 63796 Kahl am Main, Germany


4. Role of Curie temperature on thermal stability limits
of perpendicular STT-MRAM

L. Tillie1,2, R.C. Sousa2, J. Chatterjee2 , S. Auffret2, N. Lamard2, J. Guelffucci2,
E. Nowak 1, B. Dieny2 and I-L Prejbeanu2

1CEA-LETI, Minatec Campus, Grenoble, France email:

2SPINTEC, Univ. Grenoble Alpes / CEA / CNRS, Grenoble, France


5. Proposal for Fabry-Perot magnetic tunnel junctions

Abhishek Sharma, Ashwin. A. Tulapurkar, Bhaskaran Muralidharan

Department of Electrical Engineering, IIT Bombay, Powai, Mumbai-400076, India


6. Ferromagnetic resonance linewidth in nanoscale magnetic tunnel junctions

Chengcen Sha Ilya Krivorotov

Department of Physics and Astronomy, University of California, Irvine


7. ST-FMR Determination of Exchange Coupling in PMA-MRAM bits with Broken Circular Symmetry

R. S. Beach1, S. Wang1, D. Apalkov1, V. Voznyuk1, C. Sha2, I. N. Krivorotov2, and V. Nikitin1

1New Memory Technology, Samsung Semiconductor Inc., San Jose, California 95134, USA

2Dept. of Physics and Astronomy, Univ. of California, Irvine, California 92697, USA


8. Advanced measurement capabilities to assist the development of high-speed, nonvolatile magnetic memory

Tom Silva1, Hans Nembach1,2, Justin Shaw1, Andrew Berger1, Eric Edwards1, Margaret Murnane2, Henry Kapteyn2, Mark Hoefer3, Ezio Lacocca3

1NIST, Boulder, CO

2University of Colorado/JILA, Boulder, CO

3University of Colorado Applied Math, Boulder, CO


9. Study of MTJ stack uniformity at the micron length scale by current-in-plane measurements

Frederik W. Østerberg, Alberto Cagliani, Rong Lin, Lior Shiv and Peter F. Nielsen

Capres A/S Diplomevej 373, Kgs. Lyngby, Denmark


10. A novel approach for the nanopatterning of magnetic tunnel junctions circumventing the etching problem at sub-20nm feature size and dense pitch.

V. D. Nguyen1,2, P. Sabon1,2, J. Chatterjee1,2, S. Auffret1,2, R. Sousa1,2, L. Prejbeanu1,2, E. Gautier1,2, L. Vila1,2 and B. Dieny1,2

1University of Grenoble Alpes, F-38000 Grenoble

2CEA, INAC-SPINTEC, F-38000 Grenoble


11. Dense Array MRAM Fabrication

Tsai-Wei Wu, Lei Wan, Khiem Tran, Neil Smith, K.C. Patel, Patrick Braganca, Goran Mihajlovic, Young-suk Choi, J.A. Katine

Western Digital Research, 5601 Great Oaks Parkway, San Jose, CA 95119


12. High Density p-MTJ Process Demonstration

Thomas Boone, Elizabeth Dobisz, Davide Guarisco, Pradeep Manandahar, Prachi Shrivastava, Yuan-Tung Chin, Martin Gajeck, Girish Jagtiani, Eric Ryan, Parshuram Zantye, Jacob Hernandez, Deniz Bozdag, Georg Wolf, Steve Watts, Manfred Schabes, Roberto Cordero, Danny Yam, Jorge Vasquez, and Mustafa Pinarbasi,

Spin Transfer Technolgies, Inc.  45500 Northport Loop West, Fremont, CA 94538


13. Impact of external magnetic field on embedded perpendicular STT-MRAM technology qualified for solder reflow

Chia-Yu Wang1, Meng-Chun Shih1, Yung-Huei Lee1, Wayne Wang1, Luc Thomas2, Yuan-Jen Lee2, Huanlong Liu2, Jian Zhu2, Guenole Jan2, Allen Wang2, Tom Zhong2, Po-Kang Wang2, Derek Lin1, Chia-Hsiang Chen1, Chih-Yang Chang1, Chih-Hui Weng1, Tien-Wei Chiang1, Kuei-Hung Shen1, William J. Gallagher1 and Harry Chuang1 

1Taiwan Semiconductor Manufacturing Company, 121, Park Ave. 3, Hsinchu Science Park, Taiwan 300

2TDK-Headway Technologies, Inc., Milpitas, CA 95035


14. Origin of asymmetry in thermally-driven magnetization reversal for perpendicular STT-MRAM

Apalkov D.1, Wang S. 1, Schafer S. 1, Nikitin, V. 1

1New Memory Technology Lab, Samsung Semiconductor Inc., San Jose, CA, USA


15. Tuning ST-MRAM critical current symmetry for different applications

Han-Jong Chia1, Sumio Ikegawa1, Renu Whig1, Fred Mancoff1, Jijun Sun1, Ahmet Demiray1, Jon Slaughter1

Dimitri Houssameddine2, Michael Tran2, Chenchen Wang2, Kangho Lee2, Kazutaka Yamane2


1 Everspin Technologies Inc., Chandler, Arizona

2 GLOBALFOUNDRIES Singapore Pte, Ltd., Singapore, 738406


16. Analysis of the magnetization switching in perpendicular magnetic tunnel junctions

Witold Skowroński1, Maciej Czapkiewicz1, Sławomir Ziętek1, Jakub Chęciński1, Marek Frankowski1, Piotr Rzeszut1, Stanisław Łazarski1, Jerzy Wrona2 and Tomasz Stobiecki1

1 AGH University of Science and Technology, Department of Electronics, Magnetic Multilayers and Spin Electronics Group, Al. Mickiewicza 30, 30-059 Kraków, Poland

2 Singulus Technologies, Kahl am Main, 63796, Germany


17. High speed quasistatic switching behavior of spin-transfer torque magnetic random access memory

Ming-Da Yang, Lin-Xiu Ye, Shi-Yuan Tong, and Mean-Jue Tung

ITRI, Hsinchu, Taiwan, R. O. C.


18. Ultra-high speed STT-MRAM incorporating antiferromagnetic layer

Abir Shadman1, Ran Cheng2, Di Xiao2, Jian-Gang (Jimmy) Zhu1,2

1 Department of Electrical and Computer Engineering, Carnegie Mellon University

2 Department of Physics, Carnegie Mellon University


19. Leveraging Negative Differential Resistance for Low Power, High Reliability Resistive Memories

Shaodi Wang, Andrew Pan, Cecile Grezes, Pedram Khalili Amiri, Kang L. Wang, Chi On Chui, and Puneet Gupta

Department of Electrical Engineering, University of California, Los Angeles, USA


20. Ultrafast Electrical Switching for Magnetic Random Access Memory

Amal El-Ghazaly1, Charles-Henri Lambert1, Jon Gorchon1, Akshay Pattabi1, H.S. Philip Wong2, and Jeffrey Bokor1

1 Department of Electrical Engineering and Computer Sciences, University of California Berkeley, Berkeley, CA 94720 USA

2 Department of Electrical Engineering, Stanford University, Stanford, CA 94305 USA


21. Magnetic Tunneling Junctions Based IoT Data Privacy Protection with STT-MRAM

Yao-Tung Tsou1, Hao Zhen2, Yu-Chian Chang2, Sy-Yen Kuo2, Ching-Ray Chang3, Akio Fukushima4,

Bor-Doou Rong5

1 Department of Communications Engineering, Feng Chia University, Taichung 407, Taiwan.

2 Department of Electrical Engineering, National Taiwan University, Taipei 106, Taiwan.

3 Department of Physics, National Taiwan University, Taipei 106, Taiwan.

4 Spintronics Research Center, National Institute of Advanced Industrial Science and Technology,

Tsukuba, Ibaraki, 305-8568, Japan.

5 Etron Technology Inc., Taipei 300, Taiwan.


22. Spintronic Analog to Stochastic Bit Stream Converter Utilizing Voltage-Assisted Spin Hall Effect

H. Lee 1,2, A. Lee 1,2, F. Ebrahimi1,2, P. Khalili Amiri1,2, and K. L. Wang1

1 UCLA, Los Angeles, CA 90095, USA

2 Inston Inc., Los Angeles, CA 90095, USA


23. Hierarchical Store-Free Architecture for Nonvolatile SRAM Using STT-MTJs

D. Kitagata, S. Yamamoto, and S. Sugahara

FIRST, Tokyo Institute of Technology, Japan


24. SpinPIM: Spintronic ProcessingInMemory Paradigm to Embed computation

capability into MRAMs

Wang Kang, He Zhang, and Weisheng Zhao*

Fert Beijing Institute, BDBC, Beihang University, Beijing, China


25. High Speed and High-Area Efficiency Non-Volatile Look-Up Table Design Based on Magnetic Tunnel Junction

Rana Alhalabi1, Gregory Di Pendina2, Ioan-lucian Prejbeanu2, Etienne Nowak1

1 CEA LETI, Minatec campus, 17 Rue des martyrs, 38054 Grenoble, France

2 Univ. Grenoble Alpes, CEA, CNRS, Grenoble INP*, INAC, SPINTEC, F-38000

Grenoble, France


26. Circuit-Integrated Micromagnetic Modeling of MRAM Devices

 Volvach I,1 M. Kuteifan1, Marko V. Lubarda1 and Vitaliy Lomakin1

1ECE Department University of California, San Diego, CA, USA


27. Development of SOT-MRAM for energy efficient non-volatile memories

G. Mihajlović, Y. Choi, N. Smith, L. Wan, O. Mosendz, J.A. Katine

Western Digital Corporation, San Jose, CA 95119


28.  Spin-orbit torque switching of nanoscale devises for high-speed MRAMs

C. Zhang1,2,B. Jinnai2, S. Fukami1-4,H.Sato1-4, K. Watanabe1, A. Kurnkov1, M. Bersweiler2, S. DuttaGupta1,4, and H.Ohno1-5

1 Laboratory for Nanoelectronics and Spintronics, Research Institute of Electrical Communication,Tohoku University, Sendai, Japan

2 Center for Spintronics Integrated Systems, Tohoku University, Sendai,Japan

3 Center for Innovative Integrated Electronic Systems, Tohoku University, Sendai, Japan

4 Center for Spintronics Research Network, Tohoku University, Sendai,Japan

5 WPI Advanced Institute for Materials Research, Tohoku University, Sendai, Japan


29. Pulse-width and temperature effect on the switching behavior of a lowinput resistance Spin-Orbit-Torque MRAM cell

I. J. Wang1, S. Z. Rahaman1,*, C. F. Pai2, D. Y. Wang1, Y. C. Hsin1, H. H. Lee1, Y. J. Chang1, G. L. Chen1,

S. Y. Yang1, Y. C. Kuo1, Y. H. Su1, Y. S. Chen1, M. J. Kao1, C. I. Wu1, and D. L. Deng1

1 Electronic and Optoelectronic System Research Laboratories, Industrial Technology Research Institute, Hsinchu, Taiwan,

2 Department of Materials Science and Engineering, National Taiwan University, Taipei, Taiwan


30. Low current, fast and reliable spin-orbit torque switching of tungsten-based three-terminal magnetic tunnel junctions with Hf atomic insertion layers

Shengjie Shi, Yongxi Ou, Sriharsha Aradhya and R. A. Buhrman

Cornell University, Ithaca NY 14850, USA


31. Field-free spin-orbit torque switching of composite perpendicular CoFeB/Gd/CoFeB layers utilized for three-terminal magnetic tunnel junctions

Jun-Yang Chen1, Mahendra DC2, Delin Zhang1, Zhengyang Zhao1, Mo Li1 and Jian-Ping Wang1

1 Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55455 USA

2 School of Physics and Astronomy, University of Minnesota, Minneapolis, MN 55455, USA


32. An Ultimate Field-Free Solution for Perpendicular Spin Hall MRAM with a Dipole-Coupled Composite Structure

Zhengyang Zhao, Angeline K. Smith, Mahdi Jamali, and Jian-Ping Wang

Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55455


33. Current-induced magnetic domain wall motion in compensated ferrimagnet

Saima A Siddiqui1, Jiahao Han1, Joseph T Finley1, Caroline A Ross2 and Luqiao Liu1

1 Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA 02139

2 Department of Materials Science and Engineering, Massachusetts Institute of Technology,

Cambridge, MA 02139


34. STTMRAM-based Spintronic Processing in Memory Hardware Architecture for Neural Networks

Biao Pan1,2Wang Kang1Jinyu Bai1Peng Ouyang1Youguang Zhang1Weisheng Zhao1

1 Department of Electronic and Information Engineering, Beihang University, Beijing, 100191, People’s Republic of China

2 Beijing Advanced Innovation Center for Big Data and Brain ComputingBeihang University, Beijing, 100191, People’s Republic of China


35. Learning pattern classification with coupled spin-torque nano-oscillators

P. Talatchian1, M. Romera 1, F. Abreu Araujo 1, S. Tsunegi 2, H. Kubota 2, H. Yakushiji 2, A. Fukushima2, S. Yuasa 2, P. Bortolotti1, V. Cros1, D. Vodenicarevic 3, N. Locatelli 3, D. Querlioz 3, J. Grollier 1

1 Unité Mixte de Physique CNRS/Thales, Palaiseau, et Université Paris-Sud, Orsay, France

2 Spintronics Research Center, AIST, Tsukuba, Japan

3 Centre de Nanosciences et de Nanotechnologies, CNRS, Université Paris-Sud, Orsay, France